Media access control architectures and network management systems

US 6,108,713 A
Filed: 04/24/1997
Issued: 08/22/2000
Est. Priority Date: 02/11/1997
Status: Expired due to Term

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1. A media access controller, comprising:

a transmit media access controller configured to process out-going packet data that is received from an upper layer for transmission to a physical layer, at least part of the processing being alterable by control information received while the out-going packet data is being processed;

a receive media access controller configured to process in-coming packet data that is received from the physical layer for transmission to the upper layer, at least part of the processing being alterable by control information received while the in-coming packet data is being processed;

a transmit multi-packet queue device for receiving the out-going packet data from the upper layer before being passed to the transmit media access controller;

a receive multi-packet queue device for receiving the in-coming packet data that is received by the receive media access controller; and

a media access controller manager interfacing with the transmit and receive media access controllers, the media access controller manager being responsible for managing the flow of packet data through the transmit and receive multi-packet queue devices.

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Abstract

Disclosed is a media access controller for transferring data along a computer network. The media access controller includes a transmit media access controller that is configured to process out-going packet data received from an upper layer for transmission to a physical layer. A receive media access controller that is configured to process in-coming packet data received from the physical layer for transmission to the upper layer. A transmit multi-packet queue FIFO for receiving the out-going packet data from the upper layer before being passed to the transmit media access controller. A receive multi-packet queue FIFO for receiving the in-coming packet data that is received by the receive media access controller. The media access controller further including a media access controller manager interfacing with the transmit and receive media access controllers. The media access controller manager being responsible for managing the flow of packet data through the transmit and receive multi-packet queue FIFOs.

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1. A media access controller, comprising:
- a transmit media access controller configured to process out-going packet data that is received from an upper layer for transmission to a physical layer, at least part of the processing being alterable by control information received while the out-going packet data is being processed;
  
  a receive media access controller configured to process in-coming packet data that is received from the physical layer for transmission to the upper layer, at least part of the processing being alterable by control information received while the in-coming packet data is being processed;
  
  a transmit multi-packet queue device for receiving the out-going packet data from the upper layer before being passed to the transmit media access controller;
  
  a receive multi-packet queue device for receiving the in-coming packet data that is received by the receive media access controller; and
  
  a media access controller manager interfacing with the transmit and receive media access controllers, the media access controller manager being responsible for managing the flow of packet data through the transmit and receive multi-packet queue devices.

2. A media access controller comprising:
- a transmit media access controller configured to process out-going packet data that is received from an upper layer for transmission to a physical layer;
  
  a receive media access controller configured to process in-coming packet data that is received from the physical layer for transmission to the upper layer;
  
  a transmit multi-packet queue device for receiving the out-going packet data from the upper layer before being passed to the transmit media access controller;
  
  a receive multi-packet queue device for receiving the in-coming packet data that is received by the receive media access controller;
  
  a media access controller manager interfacing with the transmit and receive media access controllers, the media access controller manager being responsible for managing the flow of packet data through the transmit and receive multi-packet queue devices; and
  
  a parallel event processor for processing management information and control information in parallel with the processing of packet data through the transmit media access controller and the receive media access controller.
- View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
- - 3. A media access controller as recited in claim 2, wherein the parallel event processor includes a packet buffer for storing simple network management protocol information, and remote monitoring information that is used to characterize network traffic statistics.
  - 4. A media access controller as recited in claim 2, wherein the parallel event processor includes programmable counters for storing information related to new network processing events and statistics.
  - 5. A media access controller as recited in claim 2, further comprising a first internal stream processor for processing packet data being transferred between the transmit multi-queue device and the transmit media access controller, the first internal stream processor also being configured to process packet data being transferred between the receive media access controller and the receive multi-queue device.
  - 6. A media access controller as recited in claim 5, wherein said parallel event processor further comprises a second internal micro-RISC stream processor configured to selectively filter packet data being processed through the first internal micro-RISC stream processor, wherein the selective filtering provides packet data for processing management requests.
  - 7. A media access controller as recited in claim 6, wherein the second internal micro-RISC stream processor is configured to receive selected packet data from the transmit media access controller and the receive media access controller for processing management requests.
  - 8. A media access controller as recited in claim 7, wherein the second internal micro-RISC stream processor stores the selected packet data in statistical counters contained within the parallel event processor.
  - 9. A media access controller as recited in claim 8, further comprising transmit and receive network flow managing device controllers, the transmit network flow managing device controller being in communication between the transmit multi-packet queue device and the media access controller manager, the receive network flow managing device controller being in communication between the receive multi-packet queue device and the media access controller manager.
  - 10. A media access controller as recited in claim 9, further including a network data bus interface controller for communicating packet data information between the transmit and receive multi-packet queue devices and a network data system bus.
  - 11. A media access controller as recited in claim 10, wherein the network data bus interface controller is in communication with the media access controller manager.
  - 12. A media access controller as recited in claim 9, further including a streaming control bus interface controller for communicating between the parallel event processor and a management/control bus that is separate from a network data system bus.

13. A network interface system comprising:
- a media access controller for processing transmit data received an upper layer and transmitting the processed transmit data to a lower layer, processing receive data received from the lower layer and transmitting the processed receive data to the upper layer, the media access controller being configured to monitor the flow of data between the upper and lower layers;
  
  a data bus for communicating data and data control information between the upper layer and the media access controller; and
  
  a management control bus for communicating management control information between the upper layer and the media access controller, the management control bus communicating independently of the data bus.
- View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23)
- - 16. A media access controller as recited in claim 13, wherein the first bus is in communication with a transmit buffer and a receive buffer, the transmit buffer and the receive buffer are configured to store data being transferred out through the transmit controller and data being transferred in through the receive controller.
  - 17. A media access controller as recited in claim 16, wherein the transmit buffer and receive buffer are configured to store a plurality of data packets.
  - 18. A media access controller as recited in claim 17, further comprising:
    - a transmit flow manager being in communication with the transmit buffer for controlling the transfer of the plurality of data packets stored in the transmit buffer; and
      
      a receive flow manager being in communication with the receive buffer for controlling the transfer of the plurality of data packets stored in the receive buffer.
  - 19. A media access controller as recited in claim 18, wherein the transmit flow manager is configured to number each of the plurality of data packets stored in the transmit buffer in a circular sequence numbering scheme.
  - 20. A media access controller as recited in claim 18, wherein the receive flow manager is configured to number each of the plurality of data packets stored in the receive buffer in a circular sequence numbering scheme.
  - 21. A media access controller as recited in claim 19, wherein the transmit flow manager is configured instruct the transmit buffer to re-transmit selected data packets stored in the transmit buffer to the transmit controller when a collision is detected.
  - 22. A media access controller as recited in claim 19, wherein packet data stored in the transmit buffer is not flushed until all packets associated with the selected circular sequence numbering scheme have been transmitted.
  - 23. A media access controller as recited in claim 22, wherein the media access controller is programmable through a graphical user interface.

14. A network interface system, comprising:
- a media access controller for processing transmit data received an upper layer and transmitting the processed transmit data to a lower layer, processing receive data received from the lower layer and transmitting the processed receive data to the upper layer, the media access controller being configured to monitor the flow of data between the upper and lower layers;
  
  a data bus for communicating data and data control information between the upper layer and the media access controller;
  
  a management control bus for communicating management control information between the upper layer and the media access controller, the management control bus being independent of the data bus;
  
  a transmit controller for processing the transmit data to be transferred to the lower layer, the processing including encapsulating the transmit data with at least one header;
  
  a receive controller for processing the receive data communicated from the lower layer that is connected to a physical network, the processing including stripping at least one header and communicating the receive data to the upper layer; and
  
  a parallel event processor coupled to the control bus for processing management tasks.
- View Dependent Claims (15)
- - 15. A network interface system as recited in claim 14 wherein the media access controller further includes:
    - a data management unit for interfacing with the transmit controller and the receive controller, the transmit controller and the receive controller being configured to communicate data through the first bus;
      
      a first processor for filtering selected data being communicated from an upper layer to the transmit controller, and filtering selected data that is communicated to the upper layer from the receive controller;
      
      a second processor configured to receive the selected data filtered by the first microprocessor and communicate the filtered data through the second bus.

24. A method for making a media access controller for processing data transmit requests, data receive requests and monitoring data flow through the media access controller, the media access controller being configured to communicate with an upper layer and a lower layer, the method comprising:
- integrating a first bus for transferring data into and out of the media access controller; and
  
  integrating a second bus for communicating management control requests to the media access controller while the transferring of data is in progress to thereby alter such transferring of data, the second bus being coupled to a parallel events processor containing a microprocessor for filtering selected data that is being transferred through the first bus.

25. A method for making a media access controller for processing data transmit requests, data receive requests and monitoring data flow through the media access controller, the media access controller being configured to communicate with an upper layer and a lower layer, the method comprisingintegrating a first bus for transferring data into and out of the media access controller;
- integrating a second bus for communicating management control requests to the media access controller while the transferring of data is in progress the second bus being coupled to a parallel events processor containing a microprocessor for filtering selected data that is being transferred through the first bus; and
  
  integrating a transmit controller and a receive controller to be in communication with the first bus;
  
  integrating a management processor for controlling the operations of the transmit controller and the receive controller.
- View Dependent Claims (26)
- - 26. A method for making a media access controller as recited in claim 25, wherein the transmit controller includes a plurality of data modifying registers for controlling the character of the data being transferred through the first bus.

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Current Assignee
Secure Axcess LLC (Prism Technologies Group, Inc.)
Original Assignee
Xaqti Corporation (Microchip Technology Incorporated)
Inventors
Sambamurthy, Namakkal S., Tripathi, Devendra K., Deb, Alak K., Truong, Linh Tien, Kumar, Praveen D.
Primary Examiner(s)
Maung, Zarni
Assistant Examiner(s)
WINDER, PATRICE L

Application Number

US08/845,562
Time in Patent Office

1,216 Days
Field of Search

709/234, 709/250, 370/462, 370/463, 370/475, 395/507
US Class Current

709/250
CPC Class Codes

H04L 41/0213   Standardised network manage...

H04L 41/069   using logs of notifications...

H04L 41/22   comprising specially adapte...

H04L 43/0847   Transmission error

H04L 49/90   Buffering arrangements

H04L 49/9063   Intermediate storage in dif...

H04L 69/12   Protocol engines

H04L 9/40   Network security protocols

Media access control architectures and network management systems

First Claim

16 Assignments

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Abstract

175 Citations

26 Claims

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Media access control architectures and network management systems

First Claim

16 Assignments

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Abstract

175 Citations

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