Asymmetric, double-sided self-aligned silicide and method of forming the same
DCFirst Claim
1. An integrated circuit comprising:
- a silicon substrate;
an insulating layer formed over the silicon substrate with a contact opening formed in the insulating layer; and
a conductive contact directly contacting the silicon substrate within the contact opening, the contact comprising metal silicide interspersed with metal nitride throughout the metal silicide, including at a substrate-silicide interface.
2 Assignments
Litigations
1 Petition
Accused Products
Abstract
Disclosed are structures and processes which are related to asymmetric, self-aligned silicidation in the fabrication of integrated circuits. A pre-anneal contact stack includes a silicon substrate, a metal source layer such as titanium-rich titanium nitride (TiNx), and a silicon layer. The metal nitride layer is deposited on the substrate by sputtering a target metal reactively in nitrogen and argon ambient. A N:Ar ratio is selected to deposit a uniform distribution of the metal nitride in an unsaturated mode (x<1) over the silicon substrate. The intermediate substrate structure is sintered to form a metal silicide. The silicidation of metal asymmetrically consumes less of the underlying silicon than the overlying silicon layer. The resulting structure is a mixed metal silicide/nitride layer which has a sufficient thickness to provide low sheet resistance without excessively consuming the underlying substrate. A metal nitride of maximum bulk resistivity within the unsaturated (metal-rich) realm is chosen for maximizing asymmetry in the silicidation.
88 Citations
13 Claims
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1. An integrated circuit comprising:
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a silicon substrate; an insulating layer formed over the silicon substrate with a contact opening formed in the insulating layer; and a conductive contact directly contacting the silicon substrate within the contact opening, the contact comprising metal silicide interspersed with metal nitride throughout the metal silicide, including at a substrate-silicide interface. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An integrated circuit comprising:
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a silicon substrate having an upper surface; and a self-aligned contact comprising a metal silicide layer, having a metal silicide thickness, the metal silicide layer extending into the substrate below the upper surface of the substrate by an amount less than about 30% of the metal silicide thickness, wherein the metal silicide layer includes a metal nitride interspersed therein. - View Dependent Claims (9, 10, 11, 12, 13)
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Specification