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Semiconductor memory device having a plurality of bank sections distributed in a plurality of divided memory cell arrays

DC
  • US 6,209,056 B1
  • Filed: 06/30/1997
  • Issued: 03/27/2001
  • Est. Priority Date: 06/29/1996
  • Status: Expired due to Term
First Claim
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1. A semiconductor memory device comprising:

  • a plurality of memory cell arrays, each memory cell array including a plurality of bank sections that have respective sequence numbers, bank sections having different sequence numbers being accessed independently of each other;

    a plurality of data bus lines for transferring data in order to write data into a desired bank section in each memory cell array and to read data from a desired bank section in each memory cell array;

    wherein desired bank sections with a same sequence number in each of said plurality of memory cell arrays are selected simultaneously by a vertical and horizontal bank selection signal, the selected bank sections, which are distributed across said plurality of memory cell arrays, together forming a bank.

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