Method and apparatus for trench isolation process with pad gate and trench edge spacer elimination
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First Claim
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1. A method of forming a trench isolation structure on a microelectronic substrate, the method comprising the steps of:
- forming a trench in the microelectronic substrate;
depositing a field oxide in the trench extending from the trench to a height which is less than half of a height of a gate structure to be formed on the substrate;
forming the gate structure on the substrate; and
forming a spacer adjacent the gate structure.
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Abstract
A microelectronic device includes a field oxide isolation pad which extends from a trench formed in a microelectronic substrate by a height which is less than approximately two times the height of a gate structure formed on the microelectronic substrate. Spacers are formed around the gate structures, although little or no spacer forms around the isolation pad. The microelectronic device is fabricated by forming a gate oxide layer on a microelectronic substrate, depositing a first gate layer on the gate oxide layer, forming a trench extending through the gate layer, the gate oxide layer and into the substrate, filling the trench with a field oxide, planarizing the field oxide, recessing the field oxide to a level above the microelectronic substrate and below an upper level of the first gate layer, forming a second gate layer over the recessed field oxide and the first gate layer, forming a conductive layer over the second gate layer, forming gate structures in the conductive layer, the first and second gate layers, and the gate oxide layer, and forming spacers adjacent the gate structures.
32 Citations
38 Claims
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1. A method of forming a trench isolation structure on a microelectronic substrate, the method comprising the steps of:
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forming a trench in the microelectronic substrate;
depositing a field oxide in the trench extending from the trench to a height which is less than half of a height of a gate structure to be formed on the substrate;
forming the gate structure on the substrate; and
forming a spacer adjacent the gate structure.
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2. A method of forming a trench isolation structure on a microelectronic substrate, the method comprising the steps of:
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depositing a field oxide isolation pad extending from a recess in the substrate to a field oxide isolation pad height;
forming a gate structure on the substrate having a height which is at least twice the height of the field oxide isolation pad height; and
forming a spacer adjacent the gate structure.
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3. A method of forming a trench isolation structure on a microelectronic substrate, the method comprising the steps of:
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forming a trench in the microelectronic substrate;
depositing a field oxide isolation pad extending from the trench by height which is less than half of a height of a component to be formed on the field oxide isolation pad;
forming the component on the field oxide isolation pad; and
forming a spacer adjacent the component.
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4. A method of forming a trench isolation structure on a microelectronic substrate, the method comprising the steps of:
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depositing a field oxide isolation pad extending from a recess in the substrate to a field oxide isolation pad height;
forming a component on the field isolation pad having a height which is at least twice the height of the field oxide isolation pad height; and
forming a spacer adjacent the component.
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5. A method of forming a trench isolation structure on a microelectronic substrate, the method comprising the steps of:
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growing a gate oxide layer on the microelectronic substrate;
depositing a first gate layer on the gate oxide layer;
forming a trench, the trench extending through the first gate layer, the gate oxide layer and into the substrate;
filling the trench with a field oxide;
planarizing the field oxide;
recessing the field oxide;
depositing a second gate layer over the recessed field oxide and the first gate layer;
forming a silicide layer over the second gate layer;
forming at least one gate structure in the silicide layer, the first and the second gate layers and the gate oxide layer; and
forming a spacer adjacent the gate structure. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
recessing the field oxide to a depth that is below an upper surface of the first gate layer. -
7. The method of claim 5 wherein the step of recessing the field oxide includes the step of
recessing the field oxide to a depth that is above an upper surface of the substrate. -
8. The method of claim 5 wherein the step of recessing the field oxide includes the step of
recessing the field oxide to a depth that is between an upper level of the first gate layer and an upper level of the substrate. -
9. The method of claim 5 wherein the step of recessing the field oxide includes the step of
recessing the field oxide to a depth that is below an upper level of the first gate layer and that is at least even with an upper level of the substrate. -
10. The method of claim 5 wherein the step of recessing the field oxide includes the step of
recessing the field oxide to a level which extends beyond an upper level of the substrate by a height which is less than or equal to approximately one half of a height of the gate structure. -
11. The method of claim 10, further comprising the step of depositing a stop layer on the first gate layer before forming the trench.
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12. The method of claim 11, wherein the step of forming a trench includes the step of
etching through the stop layer, the first gate layer, the gate oxide layer; - and etching into the substrate.
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13. The method of claim 12, further comprising the step of removing the stop layer after planarizing the field oxide.
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14. The method of claim 5 wherein the step of depositing a first gate layer includes the step of
depositing a layer of polysilicon on the gate oxide layer. -
15. The method of claim 5 wherein the step of depositing a second gate layer includes the step of
depositing a layer of polysilicon on the recessed field oxide and the first gate layer. -
16. The method of claim 5 wherein the step of forming a silicide layer includes the step of
depositing a layer of tungsten silicide on the second gate layer by chemical vapor deposition. -
17. The method of claim 5, wherein the step of forming the silicide layer includes the step of:
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depositing a conductor by chemical vapor deposition on at least one of the first and the second gate layers; and
reacting the metal with the at least one of the first and the second gate layers to form a silicide.
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18. A method of forming a trench isolation structure on a microelectronic substrate, comprising:
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growing a gate oxide layer on the microelectronic substrate;
depositing a first gate layer on the gate oxide layer;
forming a trench, the trench extending through the first gate layer, the gate oxide layer and into the substrate;
filling the trench with a field oxide;
planarizing the field oxide;
recessing the field oxide to a depth that is below an upper surface of the first gate layer;
depositing a second gate layer over the recessed field oxide and the first gate layer;
forming a silicide layer over the second gate layer;
forming at least one gate structure in the silicide layer, the first and the second gate layers and the gate oxide layer; and
forming a spacer adjacent the gate structure. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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29. A method of forming a trench isolation structure on a microelectronic substrate, comprising:
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growing a gate oxide layer on the microelectronic substrate;
depositing a first gate layer on the gate oxide layer;
depositing a stop layer on the first gate layer before forming a trench;
forming the trench, the trench extending through the stop layer, the first gate layer, the gate oxide layer and into the substrate;
filling the trench with a field oxide;
planarizing the field oxide;
recessing the field oxide;
depositing a second gate layer over the recessed field oxide and the first gate layer;
forming a silicide layer over the second gate layer;
forming at least one gate structure in the silicide layer, the first and the second gate layers and the gate oxide layer; and
forming a spacer adjacent the gate structure. - View Dependent Claims (30, 31, 32, 33)
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34. A method of forming a trench isolation structure on a microelectronic substrate, comprising:
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growing a gate oxide layer on the microelectronic substrate;
depositing a first gate layer on the gate oxide layer;
forming a trench, the trench extending through the first gate layer, the gate oxide layer and into the substrate;
filling the trench with a field oxide;
planarizing the field oxide;
recessing the field oxide;
depositing a second gate layer over the recessed field oxide and the first gate layer;
forming a silicide layer over at least one of the first and second gate layers including depositing a conductor by chemical vapor deposition on the at least one of the first and second gate layers, and reacting the conductor with the at least one of the first and second gate layers;
forming at least one gate structure in the silicide layer, the at least one of the first and the second gate layers and the gate oxide layer; and
forming a spacer adjacent the gate structure. - View Dependent Claims (35, 36, 37, 38)
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Specification
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Litigation Data
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Current AssigneeRound Rock Research LLC
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Original AssigneeMicron Technology, Inc.
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InventorsSandhu, Gurtej S., Fazan, Pierre C.
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Primary Examiner(s)Niebling, John F.
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Assistant Examiner(s)Jones, Josetta I.
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Application NumberUS09/644,282Time in Patent Office574 DaysField of Search438/270, 438/296, 438/424US Class Current438/270CPC Class CodesH01L 21/76224 using trench refilling with...H01L 21/823481 isolation region manufactur...
