Circuit for clamping current in a charge pump
DCFirst Claim
1. A method for clamping current in a charge pump, the charge pump including switching circuitry and a capacitor, and the charge pump defining first and second paths through which current is transmitted to/received from the capacitor, at least one parasitic spike in current from at least one of a number of transistors of the switching circuitry being generated during switching off of the at least one of the transistors, the at least one parasitic spike dissipated after elapse of a short period of time, the method comprising the steps of:
- providing at least one control signal that causes the switching off of the at least one of the transistors when said at least one control signal changes from a first value to a second value;
switching a first transistor on to open an additional path for the current from the at least one of the transistors when said at least one control signal changes from said first value to said second value in order that the at least one parasitic spike is only partially communicated through a selected one of the first and second paths; and
switching a second transistor off to close said additional path after said additional path has been open for the short period of time.
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Abstract
A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump.
52 Citations
11 Claims
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1. A method for clamping current in a charge pump, the charge pump including switching circuitry and a capacitor, and the charge pump defining first and second paths through which current is transmitted to/received from the capacitor, at least one parasitic spike in current from at least one of a number of transistors of the switching circuitry being generated during switching off of the at least one of the transistors, the at least one parasitic spike dissipated after elapse of a short period of time, the method comprising the steps of:
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providing at least one control signal that causes the switching off of the at least one of the transistors when said at least one control signal changes from a first value to a second value; switching a first transistor on to open an additional path for the current from the at least one of the transistors when said at least one control signal changes from said first value to said second value in order that the at least one parasitic spike is only partially communicated through a selected one of the first and second paths; and switching a second transistor off to close said additional path after said additional path has been open for the short period of time. - View Dependent Claims (2, 3, 4, 5)
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6. Apparatus comprising:
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a charge pump including a number of switching transistors, a current clamping circuit and a capacitor, said charge pump defining first and second paths through which current is transmitted to/received from said capacitor, and one of said switching transistors located on a selected one of said first and second paths, the switching transistor generating a parasitic spike in current when it switches off, said parasitic spike dissipated after elapse of a short period of time; and an input providing a control signal for causing the switching off of the switching transistor when said control signal changes from a first value to a second value, said current clamping circuit for (i) switching a first transistor on to open an additional path for the current from the switching transistor when the control signal changes from said first value to said second value in order that said parasitic spike is only partially communicated through the one of the first and second paths; and
(ii) switching a second transistor off to close said additional path after said additional path has been open for said short period of time. - View Dependent Claims (7, 8, 9, 10, 11)
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Specification