Power management block for use in a non-volatile memory system

US 20040083405A1
Filed: 10/14/2003
Published: 04/29/2004
Est. Priority Date: 10/28/2002
Status: Active Grant

First Claim

Patent Images

1. A method for utilizing a memory system, the memory system including a non-volatile memory, the non-volatile memory including at least one reserved memory area, the method comprising:

providing power to the memory system;

initializing the non-volatile memory; and

writing a first signature into the at least one reserved memory area, wherein the first signature is arranged to indicate that the memory system was successfully initialized.

View all claims

11 Assignments

Timeline View

Assignment View

0 Petitions

Accused Products

Abstract

Methods and apparatus for enabling a power up process of a non-volatile memory to occur efficiently are disclosed. According to one aspect of the present invention, a method for utilizing a memory system that has a non-volatile memory with at least one reserved memory area includes providing power to the memory system, initializing the non-volatile memory, and writing a first signature into the reserved memory area. The first signature is arranged to indicate that the memory system was successfully initialized. In one embodiment, the method also includes executing a power down process on the memory system, and writing a second signature into the reserved memory area which indicates that the power down process has been executed.

102 Citations

View as Search Results

46 Claims

1. A method for utilizing a memory system, the memory system including a non-volatile memory, the non-volatile memory including at least one reserved memory area, the method comprising:
- providing power to the memory system;
  
  initializing the non-volatile memory; and
  
  writing a first signature into the at least one reserved memory area, wherein the first signature is arranged to indicate that the memory system was successfully initialized.
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
- - 2. The method of claim 1 further including:
    - executing a power down process on the memory system; and
      
      writing a second signature into the at least one reserved memory area, wherein the second signature is arranged to indicate that the power down process has been executed.
  - 3. The method of claim 2 further including:
    - removing power from the memory system after writing the second signature into the at least one reserved memory area.
  - 4. The method of claim 2 wherein writing the second signature into the at least one reserved memory area includes writing additional information with the second signature into the at least one reserved memory area.
  - 5. The method of claim 2 wherein the at least one reserved memory area is a block, and writing the second signature into the at least one reserved memory area includes writing the second signature into a second page included in the block.
  - 6. The method of claim 5 wherein writing the first signature into the at least one reserved memory area includes writing the first signature into a first page included in the block.
  - 7. The method of claim 2 wherein executing the power down process includes at least one of completing a file copying process and resolving physical blocks associated with the non-volatile memory.
  - 8. The method of claim 1 wherein writing the first signature into the at least one memory area includes writing additional information with the first signature into the at least one reserved memory area.
  - 9. The method of claim 1 wherein the at least one reserved memory area is a block, and writing the first signature into the at least one reserved memory area includes writing the first signature into a first page included in the block.
  - 10. The method of claim 1 wherein the non-volatile memory is a NAND flash memory.

11. A memory system comprising:
- a non-volatile memory including at least one reserved memory area;
  
  means for providing power;
  
  means initializing the non-volatile memory; and
  
  means for writing a first signature into the at least one reserved memory area, wherein the first signature is arranged to indicate that the non-volatile memory was successfully initialized.
- View Dependent Claims (12, 13, 14)
- - 12. The memory system of claim 11 further including:
    - means for executing a power down process on the memory system; and
      
      means for writing a second signature into the at least one reserved memory area, wherein the second signature is arranged to indicate that the power down process has been executed.
  - 13. The memory system of claim 12 wherein the at least one reserved memory area is a block, and writing the first signature into the at least one reserved memory area includes writing the first signature into a first page included in the block and writing the second signature into the at least one reserved memory area includes writing the second signature into a second page included in the block.
  - 14. The memory system of claim 11 wherein the non-volatile memory is a NAND flash memory.

15. A memory device comprising:
- code devices that are arranged to maintain at least one reserved memory area within a non-volatile memory;
  
  code devices that cause a first signature to be written into the at least one reserved memory area to indicate that the non-volatile memory was successfully initialized when the non-volatile memory is successfully initialized; and
  
  a memory section that is arranged to store the code devices.
- View Dependent Claims (16, 17, 18)
- - 16. The memory device of claim 15 further including:
    - code devices that cause a second signature to be written into the at least one reserved memory area to indicate that a power down process has been successfully executed when the power down process is successfully executed.
  - 17. The memory device of claim 16 wherein the at least one reserved memory area is a block, and the code devices that cause the first signature to be written into the at least one reserved memory area include code devices that cause the first signature to be written into a first page included in the block and the code devices that cause the second signature to be written into the at least one reserved memory area include code devices that cause the second signature to be written into a second page included in the block.
  - 18. The memory device of claim 15 wherein the code devices are one of software code devices and firmware code devices.

19. A method for utilizing a memory system, the memory system including a non-volatile memory, the non-volatile memory including at least one reserved memory area, the method comprising:
- providing power to the memory system;
  
  determining when the memory system has previously undergone a substantially normal power down process;
  
  performing a first process on the non-volatile memory when it is determined that the memory system has not previously undergone a normal power down process, the first process being arranged to ready the non-volatile memory for use; and
  
  substantially enabling the non-volatile memory to be used when it is determined that the memory system has previously undergone a normal power down process.
- View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28)
- - 20. The method of claim 19 wherein substantially enabling the non-volatile memory to be used includes writing a first signature into the at least one reserved memory area to indicate that the non-volatile memory is substantially enabled.
  - 21. The method of claim 19 wherein determining when the memory system has previously undergone the substantially normal power down process includes:
    - determining when the at least one reserved memory area includes a first signature, the first signature being arranged to indicate that the normal power down process has previously occurred.
  - 22. The method of claim 21 wherein determining when the memory system has previously undergone the substantially normal power down process further includes:
    - determining when the at least one reserved memory area includes a second signature, the second signature being arranged to indicate that the memory system has previously undergone an initialization process.
  - 23. The method of claim 22 wherein when it is determined that the at least one reserved memory area does not include the second signature and does not include the first signature, the first process is the initialization process.
  - 24. The method of claim 22 wherein when it is determined that the at least one reserved memory area includes the second signature and does not include the first signature, the first process is a data recovery process.
  - 25. The method of claim 24 wherein the data recovery process is arranged to reclaim memory within the non-volatile memory.
  - 26. The method of claim 25 wherein the data recovery process includes at least one of completing a file copying process and resolving physical blocks associated with the non-volatile memory.
  - 27. The method of claim 19 wherein the first process is one of a data recovery process and a memory initialization process.
  - 28. The method of claim 19 wherein the non-volatile memory is a NAND flash memory.

29. A memory system comprising:
- a non-volatile memory, the non-volatile memory including at least one reserved memory area;
  
  means for providing power to the memory system;
  
  means for determining when the memory system has previously undergone a substantially normal power down process;
  
  means for performing a first process on the non-volatile memory when it is determined that the memory system has not previously undergone a normal power down process, the first process being arranged to ready the non-volatile memory for use; and
  
  means for substantially enabling the non-volatile memory to be used when it is determined that the memory system has previously undergone a normal power down process.
- View Dependent Claims (30, 31, 32, 33, 34)
- - 30. The memory system of claim 29 wherein the means for substantially enabling the non-volatile memory to be used include means for writing a first signature into the at least one reserved memory area to indicate that the non-volatile memory is substantially enabled.
  - 31. The memory system of claim 29 wherein the means for determining when the memory system has previously undergone the substantially normal power down process include:
    - means for determining when the at least one reserved memory area includes a first signature, the first signature being arranged to indicate that the normal power down process has previously occurred.
  - 32. The memory system of claim 31 wherein the means for determining when the memory system has previously undergone the substantially normal power down process further include:
    - means for determining when the at least one reserved memory area includes a second signature, the second signature being arranged to indicate that the memory system has previously undergone an initialization process.
  - 33. The memory system of claim 32 wherein when it is determined that the at least one reserved memory area does not include the second signature and does not include the first signature, the first process is the initialization process.
  - 34. The memory system of claim 32 wherein when it is determined that the at least one reserved memory area includes the second signature and does not include the first signature, the first process is a data recovery process.

35. A memory system comprising:
- code devices that cause a determination of when the memory system has previously undergone a substantially normal power down process;
  
  code devices that are arranged to cause a first process to be performed on a non-volatile memory associated with the memory system when it is determined that the memory system has not previously undergone a normal power down process, wherein the first process is arranged to ready the non-volatile memory for use;
  
  code devices that are arranged to cause the non-volatile memory to be enabled for use when it is determined that the memory system has previously undergone a normal power down process; and
  
  a memory area that stores the code devices.
- View Dependent Claims (36, 37, 38, 39, 40)
- - 36. The memory system of claim 35 wherein the code devices that are arranged to cause the non-volatile memory to be enabled for use include code devices that are arranged to write a first signature into at least one reserved memory area of the non-volatile memory to indicate that the non-volatile memory is enabled for use.
  - 37. The memory system of claim 35 wherein the code devices that cause the determination of when the memory system has previously undergone the substantially normal power down process include:
    - code devices that are arranged to cause a determination of when at least one reserved memory area of the non-volatile memory includes a first signature, the first signature being arranged to indicate that the normal power down process has previously occurred.
  - 38. The memory system of claim 37 wherein the code devices that cause the determination of when the memory system has previously undergone the substantially normal power down process further include:
    - code devices that are arranged to cause a determination of when the at least one reserved memory area includes a second signature, the second signature being arranged to indicate that the memory system has previously undergone an initialization process.
  - 39. The memory system of claim 38 wherein when it is determined that the at least one reserved memory area does not include the second signature and does not include the first signature, the first process is the initialization process.
  - 40. The memory system of claim 38 wherein when it is determined that the at least one reserved memory area includes the second signature and does not include the first signature, the first process is a data recovery process.

41. A memory system comprising:
- a non-volatile memory; and
  
  a control device, the control device being arranged to determine when the memory system has previously undergone a substantially normal power down process, to perform a first process on the non-volatile memory when it is determined that the memory system has not previously undergone a normal power down process wherein the first process is arranged to ready the non-volatile memory for use, and to substantially enable the non-volatile memory to be used when it is determined that the memory system has previously undergone a normal power down process.
- View Dependent Claims (42, 43)
- - 42. The memory system of claim 41 wherein the first process is one of a data recovery process and a memory initialization process.
  - 43. The system of claim 41 wherein the non-volatile memory is a NAND flash memory.

44. A memory system comprising:
- a non-volatile memory, the non-volatile memory including at least one reserved memory area;
  
  a controller, the controller being arranged to initialize the non-volatile memory and to write a first signature into the at least one reserved memory area, wherein the first signature is arranged to indicate that the memory system was successfully initialized.
- View Dependent Claims (45, 46)
- - 45. The memory system of claim 44 wherein the controller is further arranged to execute a power down process on the memory system and to write a second signature into the at least one reserved memory area, wherein the second signature is arranged to indicate that the power down process has been executed.
  - 46. The system of claim 44 wherein the non-volatile memory is a NAND flash memory.

Specification

Resources

Litigation Campaign Assessment

Current Assignee
SanDisk Technologies LLC (Western Digital Corporation)
Original Assignee
SanDisk Corporation (Western Digital Corporation)
Inventors
Qawami, Bahman, Sabet-Sharghi, Farshid, Chang, Robert C., Yudin, Sergey

Granted Patent

US 7,181,611 B2
Time in Patent Office

Days
Field of Search
US Class Current

714/24
CPC Class Codes

G06F 11/0763   by bit configuration check,...

G06F 11/1417   Boot up procedures

G06F 11/1435   using file system or storag...

G06F 11/1441   Resetting or repowering

Power management block for use in a non-volatile memory system

First Claim

11 Assignments

0 Petitions

Accused Products

Abstract

102 Citations

46 Claims

Specification

Solutions

Use Cases

Quick Links

Power management block for use in a non-volatile memory system

First Claim

11 Assignments

Subscription Required

Subscription Required

0 Petitions

Subscription Required

Accused Products

Subscription Required

Abstract

102 Citations

46 Claims

Specification

Subscription Required

Solutions

Use Cases

Quick Links