Circuit for clamping current in a charge pump
First Claim
1. A method for clamping current in a charge pump, the charge pump including switching circuitry and a capacitor, and the charge pump defining first and second paths through which current is transmitted to/received from the capacitor, at least one parasitic spike in current from at least one of a number of transistors of the switching circuitry being generated during switching off of the at least one transistor, the at least one parasitic spike dissipated after elapse of a short period of time, the method comprising the steps of:
- providing at least one control signal that causes the switching off of the at least one transistor when said at least one control signal changes from a first value to a second value;
opening an additional path for the current from the at least one of the transistors when said at least one control signal changes from said first value to said second value in order that the at least one parasitic spike is only partially communicated through a selected one of the first and second paths; and
closing said additional path after said additional path has been open for the short period of time.
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Accused Products
Abstract
A circuit for clamping current in a charge pump is disclosed. The charge pump includes switching circuitry having a number of switching circuitry transistors. Each of first and second pairs of transistors in the circuit can provide an additional path for current from its associated one of the switching circuitry transistors during off-switching of that transistor so that a spike in current from the switching circuitry transistor is only partially transmitted through a path extending between the switching circuitry transistor and a capacitor of the charge pump.
23 Citations
30 Claims
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1. A method for clamping current in a charge pump, the charge pump including switching circuitry and a capacitor, and the charge pump defining first and second paths through which current is transmitted to/received from the capacitor, at least one parasitic spike in current from at least one of a number of transistors of the switching circuitry being generated during switching off of the at least one transistor, the at least one parasitic spike dissipated after elapse of a short period of time, the method comprising the steps of:
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providing at least one control signal that causes the switching off of the at least one transistor when said at least one control signal changes from a first value to a second value; opening an additional path for the current from the at least one of the transistors when said at least one control signal changes from said first value to said second value in order that the at least one parasitic spike is only partially communicated through a selected one of the first and second paths; and closing said additional path after said additional path has been open for the short period of time. - View Dependent Claims (2, 3, 4)
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5. A circuit for clamping current in a charge pump, the charge pump including switching circuitry and a capacitor, and the charge pump defining first and second paths through which current is transmitted to/received from the capacitor, at least one parasitic spike in current from at least one of a number of transistors of the switching circuitry being generated during switching off of the at least one transistor, the circuit comprising:
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first and second pairs of transistors, each of the transistors supporting on and off states, and each including a control electrode to permit transition between said states to be controlled, one of said first pair of transistors electrically connected to a first of the transistors of the switching circuitry through a first node, the first path extending through said first node, and one of said second pair of transistors electrically connected to a second of the transistors of the switching circuitry through a second node, the second path extending through said second node; first delay introducing inverter circuitry; and second delay introducing inverter circuitry, each of said first inverter circuitry and said second inverter circuitry having an input signal connected to the control electrode of the one of the respective pair of transistors and a delayed output signal connected to the control electrode of the other of the respective pair of transistors, and for a moment when the switching off occurs, both said input signal and said delayed output signal having values that produce said on state, at least one of said first and second pairs of transistors providing an additional path for the current from the at least one of the transistors during the switching off so that the at least one parasitic spike is only partially communicated through any paths to the capacitor. - View Dependent Claims (6, 7, 8, 9, 10)
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11. Apparatus comprising:
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a charge pump including a number of switching transistors, a current clamping circuit and a capacitor, said charge pump defining first and second paths through which current is transmitted to/received from said capacitor, and one of said switching transistors located on a selected one of said first and second paths, the switching transistor generating a parasitic spike in current when it switches off, said parasitic spike dissipated after elapse of a short period of time; and an input providing a control signal for causing the switching off of the switching transistor when said control signal changes from a first value to a second value, said current clamping circuit for (i) opening an additional path for the current from the switching transistor when the control signal changes from said first value to said second value in order that said parasitic spike is only partially communicated through the one of the first and second paths; and
(ii) closing said additional path after said additional path has been open for said short period of time. - View Dependent Claims (12, 13, 14, 15)
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16. A method for clamping current in a charge pump, the charge pump including switching circuitry and a capacitor, and the charge pump defining first and second paths through which current is transmitted to/received from the capacitor, at least one parasitic spike in current from at least one of a number of transistors of the switching circuitry being generated during switching off of the at least one transistor, the method comprising the steps of:
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providing at least one control signal that causes the switching off of the at least one transistor when said at least one control signal changes from a first value to a second value; opening an additional path for the current from the at least one of the transistors when said at least one control signal changes from said first value to said second value in order that the at least one parasitic spike is only partially communicated through a selected one of the first and second paths, said additional path provided to the at least one of the transistors through a first node, voltage at said first node changing in value during the switching off of the at least one transistor; and after the at least one of the transistors has switched off, minimizing leakage current flow through a transistor on the one of the first and second paths, relative to the capacitor. - View Dependent Claims (17, 18, 19, 20)
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21. Apparatus comprising:
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a charge pump including a number of switching transistors, a current clamping circuit and a capacitor, said charge pump defining first and second paths through which current is transmitted to/received from said capacitor, and one of said switching transistors and a first node located on a selected one of said first and second paths, the switching transistor generating a parasitic spike in current when it switches off; and an input providing a control signal for causing the switching off of the switching transistor when said control signal changes from a first value to a second value, said current clamping circuit for (i) opening an additional path for the current from the switching transistor when the control signal changes from said first value to said second value in order that said parasitic spike is only partially communicated through the one of the first and second paths, said additional path provided to the switching transistor through said first node, voltage at said first node changing in value during the switching off of the switching transistor; and
(ii) after the at least one of the transistors has switched off, minimizing leakage current flow through a transistor on the one of the first and second paths, relative to the capacitor. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30)
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Specification