Adjacent substantially flexible substrates having integrated circuits that are bonded together by non-polymeric layer
First Claim
Patent Images
1. Circuitry comprising:
- first, second and third substrates, each substrate having integrated circuits formed thereon and each substrate having a first substantially planar surface, the second substrate having a second substantially planar surface;
first thermal diffusion bonds comprising a first metal bonding layer between a majority of the first surfaces of the first and second substrates; and
second thermal diffusion bonds comprising a second metal bonding layer between a majority of the first surface of the third substrate and a majority of the second surface of the second substrate.
4 Assignments
1 Petition
Accused Products
Abstract
A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 μm in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
-
Citations
35 Claims
-
1. Circuitry comprising:
-
first, second and third substrates, each substrate having integrated circuits formed thereon and each substrate having a first substantially planar surface, the second substrate having a second substantially planar surface; first thermal diffusion bonds comprising a first metal bonding layer between a majority of the first surfaces of the first and second substrates; and second thermal diffusion bonds comprising a second metal bonding layer between a majority of the first surface of the third substrate and a majority of the second surface of the second substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
-
-
22. An integrated circuit structure comprising:
-
first, second, and third substrates each having integrated circuits formed thereon; at least one of metal and non-polymeric first bonding layers on the first and second substrates, wherein the first bonding layers comprise bond-forming material on a majority of first surfaces of the first and second substrates that bonds the first and second substrates to each other; and at least one of metal and non-polymeric second bonding layers on the second and third substrates, wherein the second bonding layers comprise bond-forming material on a majority of a second surface of the second substrate and a first surface of the third substrate that bonds the second and third substrates to each other. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
-
Specification